From 9efe6f22ab127d57e1ecd9d57df3187c52fc7080 Mon Sep 17 00:00:00 2001 From: Mysteo91 Date: Mon, 3 Jul 2023 15:20:00 +0300 Subject: [PATCH] --bootloader --- .idea/runConfigurations/OCD_mainprog.xml | 2 +- Boot/ARMCM0_STM32G0/types.h | 9 + Boot/App/blt_conf.h | 2 +- Boot/App/crc_calc.c | 69 ++++++ Boot/App/crc_calc.h | 16 ++ Boot/App/hooks.c | 10 +- Boot/Core/Inc/stm32g0xx_hal_conf.h | 2 +- Boot/Core/Src/crc.c | 32 --- Boot/Core/Startup/startup_stm32g071rbtx.s | 0 CMakeLists.txt | 12 +- ...tm32g071rbtx.s => startup_stm32g070cbtx.s} | 206 +++++++++--------- 11 files changed, 212 insertions(+), 148 deletions(-) create mode 100644 Boot/App/crc_calc.c create mode 100644 Boot/App/crc_calc.h delete mode 100644 Boot/Core/Src/crc.c delete mode 100644 Boot/Core/Startup/startup_stm32g071rbtx.s rename Core/Startup/{startup_stm32g071rbtx.s => startup_stm32g070cbtx.s} (54%) diff --git a/.idea/runConfigurations/OCD_mainprog.xml b/.idea/runConfigurations/OCD_mainprog.xml index 7dc6755..5a8d39b 100644 --- a/.idea/runConfigurations/OCD_mainprog.xml +++ b/.idea/runConfigurations/OCD_mainprog.xml @@ -1,5 +1,5 @@ - + diff --git a/Boot/ARMCM0_STM32G0/types.h b/Boot/ARMCM0_STM32G0/types.h index 3c62639..d59d97f 100644 --- a/Boot/ARMCM0_STM32G0/types.h +++ b/Boot/ARMCM0_STM32G0/types.h @@ -38,7 +38,16 @@ /** \brief NULL pointer value. */ #define BLT_NULL ((void *)0) +typedef enum { + CRC_OK = 0, + CRC_NOT_FOUND_IN_MAIN_FLASH, + CRC_ERROR +}err_crc_t; +typedef enum { + FLASH_AREA_MAINPROG = 0, + FLASH_AREA_FULLPROG, +}flash_area_enum_t; /**************************************************************************************** * Type definitions ****************************************************************************************/ diff --git a/Boot/App/blt_conf.h b/Boot/App/blt_conf.h index 0b89b93..2d55ab1 100644 --- a/Boot/App/blt_conf.h +++ b/Boot/App/blt_conf.h @@ -107,7 +107,7 @@ /** \brief Configure the size of the default memory device (typically flash EEPROM). */ #define BOOT_NVM_SIZE_KB (128) /** \brief Enable/disable hooks functions to override the user program checksum handling. */ -#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE (0) +#define BOOT_NVM_CHECKSUM_HOOKS_ENABLE (1) /**************************************************************************************** diff --git a/Boot/App/crc_calc.c b/Boot/App/crc_calc.c new file mode 100644 index 0000000..b0fc4b6 --- /dev/null +++ b/Boot/App/crc_calc.c @@ -0,0 +1,69 @@ +// +// Created by Professional on 22.04.2023. +// + +#include "crc_calc.h" +CRC_HandleTypeDef hcrc; +void MX_CRC_Init(void) +{ + + /* USER CODE BEGIN CRC_Init 0 */ + + /* USER CODE END CRC_Init 0 */ + + /* USER CODE BEGIN CRC_Init 1 */ + + /* USER CODE END CRC_Init 1 */ + hcrc.Instance = CRC; + hcrc.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_ENABLE; + hcrc.Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE; + hcrc.Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE; + hcrc.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; + if (HAL_CRC_Init(&hcrc) != HAL_OK) + { + NVIC_SystemReset(); + } + /* USER CODE BEGIN CRC_Init 2 */ + + /* USER CODE END CRC_Init 2 */ + +} + +err_crc_t calculateROM_CRC32(flash_area_enum_t flash_area, uint32_t *val) +{ + if (flash_area == FLASH_AREA_FULLPROG) + { + uint32_t len = *(uint32_t*)(LEN_ADDRESS); + uint32_t crc32 = *(uint32_t*) (FLASH_USER_PROG_ADDRESS + len ); + if (len >= FLASH_SIZE) + return CRC_ERROR; + uint32_t crc_calc = ~HAL_CRC_Calculate(&hcrc, (uint32_t*)FLASH_USER_PROG_ADDRESS, len ); + __HAL_CRC_DR_RESET(&hcrc); + *val = crc_calc; + if (crc32 == crc_calc) + return CRC_OK; + else + return CRC_ERROR; + } + else if (flash_area == FLASH_AREA_MAINPROG) + { +/* uint32_t crc32 = *(uint32_t*) CRC32_USER_PROG_AND_USER_LIB_ADDRESS; + uint32_t crc_calc = ~HAL_CRC_Calculate(&hcrc, FLASH_USER_PROG_ADDRESS, CRC32_USER_PROG_AND_USER_LIB_ADDRESS - 0x8002000); + __HAL_CRC_DR_RESET(&hcrc); + if (crc32 == crc_calc) + return CRC_OK; + else + return CRC_ERROR;*/ + } + +} + +uint32_t calculateBuf_CRC32(uint32_t *buf, uint32_t len) +{ + return HAL_CRC_Accumulate(&hcrc, buf, len); +} + +void reset_CrcModule(void) +{ + __HAL_CRC_DR_RESET(&hcrc); +} \ No newline at end of file diff --git a/Boot/App/crc_calc.h b/Boot/App/crc_calc.h new file mode 100644 index 0000000..638de10 --- /dev/null +++ b/Boot/App/crc_calc.h @@ -0,0 +1,16 @@ +// +// Created by Mysteo on 23.04.2023. +// + +#ifndef ARBINA_GSM_BARRIER_CRC_CALC_H +#define ARBINA_GSM_BARRIER_CRC_CALC_H + +#include "stm32g0xx.h" +#include "types.h" + + +void MX_CRC_Init(void); +err_crc_t calculateROM_CRC32(flash_area_enum_t flash_area, uint32_t *val); +uint32_t calculateBuf_CRC32(uint32_t *buf, uint32_t len); +void reset_CrcModule(void); +#endif //ARBINA_GSM_BARRIER_CRC_CALC_H diff --git a/Boot/App/hooks.c b/Boot/App/hooks.c index f0679f4..886f741 100644 --- a/Boot/App/hooks.c +++ b/Boot/App/hooks.c @@ -33,6 +33,8 @@ #include "led.h" /* LED driver header */ #include "stm32g0xx.h" /* STM32 CPU and HAL header */ #include "stm32g0xx_ll_gpio.h" /* STM32 LL GPIO header */ +#include "crc_calc.h" +#include "flash.h" /**************************************************************************************** @@ -226,7 +228,7 @@ blt_bool NvmDoneHook(void) ****************************************************************************************/ blt_bool NvmVerifyChecksumHook(void) { - return BLT_TRUE; + return calculateROM_CRC32(FLASH_AREA_FULLPROG, NULL); } /*** end of NvmVerifyChecksum ***/ @@ -240,7 +242,11 @@ blt_bool NvmVerifyChecksumHook(void) ****************************************************************************************/ blt_bool NvmWriteChecksumHook(void) { - return BLT_TRUE; + blt_bool result = BLT_TRUE; + uint32_t crc = 0; + calculateROM_CRC32(FLASH_AREA_FULLPROG, &crc); + result = FlashWrite(FLASH_USER_PROG_ADDRESS + BOOT_FLASH_VECTOR_TABLE_CS_OFFSET + 1, sizeof (blt_addr), (blt_int8u*) &crc); + return result; } #endif /* BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0 */ diff --git a/Boot/Core/Inc/stm32g0xx_hal_conf.h b/Boot/Core/Inc/stm32g0xx_hal_conf.h index 6c1d973..bfc06a8 100644 --- a/Boot/Core/Inc/stm32g0xx_hal_conf.h +++ b/Boot/Core/Inc/stm32g0xx_hal_conf.h @@ -37,7 +37,7 @@ extern "C" { /* #define HAL_ADC_MODULE_ENABLED */ /* #define HAL_CEC_MODULE_ENABLED */ /* #define HAL_COMP_MODULE_ENABLED */ -/* #define HAL_CRC_MODULE_ENABLED */ + #define HAL_CRC_MODULE_ENABLED /* #define HAL_CRYP_MODULE_ENABLED */ /* #define HAL_DAC_MODULE_ENABLED */ /* #define HAL_EXTI_MODULE_ENABLED */ diff --git a/Boot/Core/Src/crc.c b/Boot/Core/Src/crc.c deleted file mode 100644 index c34d387..0000000 --- a/Boot/Core/Src/crc.c +++ /dev/null @@ -1,32 +0,0 @@ -/* USER CODE BEGIN Header */ -/* USER CODE END Header */ -/* Includes ------------------------------------------------------------------*/ -#include "crc.h" - -/* USER CODE BEGIN 0 */ -/* USER CODE END 0 */ - -/* CRC init function */ -void MX_CRC_Init(void) -{ - - /* USER CODE BEGIN CRC_Init 0 */ - /* USER CODE END CRC_Init 0 */ - - /* Peripheral clock enable */ - LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC); - - /* USER CODE BEGIN CRC_Init 1 */ - /* USER CODE END CRC_Init 1 */ - LL_CRC_SetInputDataReverseMode(CRC, LL_CRC_INDATA_REVERSE_NONE); - LL_CRC_SetOutputDataReverseMode(CRC, LL_CRC_OUTDATA_REVERSE_NONE); - LL_CRC_SetPolynomialCoef(CRC, LL_CRC_DEFAULT_CRC32_POLY); - LL_CRC_SetPolynomialSize(CRC, LL_CRC_POLYLENGTH_32B); - LL_CRC_SetInitialData(CRC, LL_CRC_DEFAULT_CRC_INITVALUE); - /* USER CODE BEGIN CRC_Init 2 */ - /* USER CODE END CRC_Init 2 */ - -} - -/* USER CODE BEGIN 1 */ -/* USER CODE END 1 */ diff --git a/Boot/Core/Startup/startup_stm32g071rbtx.s b/Boot/Core/Startup/startup_stm32g071rbtx.s deleted file mode 100644 index e69de29..0000000 diff --git a/CMakeLists.txt b/CMakeLists.txt index f7b32c2..dd063bb 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -23,6 +23,7 @@ if(GTEST) else() + set(LEN_OFFSET 0xBC) set (CRC_ADDRESS 0) set (FLASH_MAIN_ADDRESS 0) add_subdirectory(cmake_func) @@ -34,6 +35,7 @@ else() set(MEM_MAP_FILE "memory_map.inc") FUNC_CREATE_MEMORY_MAP("${MEM_MAP_FILE}" ) endif() + math(EXPR LEN_ADDRESS "${FLASH_MAIN_ADDRESS} + ${LEN_OFFSET}" OUTPUT_FORMAT HEXADECIMAL) add_compile_definitions("PAGE_SIZE=0x0800") set(CMAKE_SYSTEM_NAME Generic) set(CMAKE_SYSTEM_VERSION 1) @@ -80,6 +82,8 @@ else() # project settings if (BOOT) + + add_compile_definitions("BOOT_FLASH_VECTOR_TABLE_CS_OFFSET=${LEN_OFFSET}" "LEN_ADDRESS=${LEN_ADDRESS}") add_definitions(-DDEBUG -DUSE_FULL_LL_DRIVER -DUSE_HAL_DRIVER -DSTM32G070xx) project(reader-boot C CXX ASM) add_compile_options(-mcpu=cortex-m0 -mthumb -mthumb-interwork) @@ -131,9 +135,8 @@ else() add_executable(${PROJECT_NAME}.elf ${SOURCES} ${LINKER_SCRIPT}) set(HEX_FILE ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.hex) set(BIN_FILE ${PROJECT_BINARY_DIR}/${PROJECT_NAME}.bin) - set(HEX_FILE_SRECORD ${PROJECT_BINARY_DIR}/${PROJECT_NAME}_SRECORD.hex) - set(HEX_FILE_SRECORD2 ${PROJECT_BINARY_DIR}/${PROJECT_NAME}_SRECORD2.hex) - + set(HEX_FILE_SRECORD_WITH_LEN_AND_CRC ${PROJECT_BINARY_DIR}/${PROJECT_NAME}_SRECORD.hex) + set(AFTER_BUILD_SCRIPT ${PROJECT_SOURCE_DIR}/scripts/after_build.ps1) if ("${CMAKE_BUILD_TYPE}" STREQUAL "Debug") add_custom_command(TARGET ${PROJECT_NAME}.elf PRE_BUILD COMMAND ${CMAKE_COMMAND} -E copy "${CMAKE_SOURCE_DIR}/${MEM_MAP_FILE_DEBUG}" ${PROJECT_BINARY_DIR}/${MEM_MAP_FILE} @@ -148,8 +151,7 @@ else() COMMAND ${CMAKE_OBJCOPY} -Oihex $ ${HEX_FILE} COMMAND ${CMAKE_OBJCOPY} -Obinary $ ${BIN_FILE} COMMENT "Building ${HEX_FILE} Building ${BIN_FILE}" - COMMAND srec_cat.exe ${HEX_FILE} -intel -crop ${FLASH_MAIN_ADDRESS} ${CRC_ADDRESS} -fill 0xff ${FLASH_MAIN_ADDRESS} ${CRC_ADDRESS} -CRC32LE ${CRC_ADDRESS} -o ${HEX_FILE_SRECORD} -intel - COMMAND ${CMAKE_OBJCOPY} -Obinary -Iihex ${HEX_FILE_SRECORD} ${BIN_FILE} + COMMAND powershell ${AFTER_BUILD_SCRIPT} ${HEX_FILE} ${HEX_FILE_SRECORD_WITH_LEN_AND_CRC} ${LEN_ADDRESS} ) endif() endif() \ No newline at end of file diff --git a/Core/Startup/startup_stm32g071rbtx.s b/Core/Startup/startup_stm32g070cbtx.s similarity index 54% rename from Core/Startup/startup_stm32g071rbtx.s rename to Core/Startup/startup_stm32g070cbtx.s index 5d98b0d..b41fe3e 100644 --- a/Core/Startup/startup_stm32g071rbtx.s +++ b/Core/Startup/startup_stm32g070cbtx.s @@ -1,8 +1,8 @@ /** ****************************************************************************** - * @file startup_stm32g071xx.s + * @file startup_stm32g070xx.s * @author MCD Application Team - * @brief STM32G071xx devices vector table for SW4STM32 toolchain. + * @brief STM32G070xx devices vector table GCC toolchain. * This module performs: * - Set the initial SP * - Set the initial PC == Reset_Handler, @@ -14,20 +14,20 @@ ****************************************************************************** * @attention * - * Copyright (c) 2018 STMicroelectronics. All rights reserved. + * Copyright (c) 2018-2021 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ - .syntax unified - .cpu cortex-m0 - .fpu softvfp - .thumb +.syntax unified +.cpu cortex-m0plus +.fpu softvfp +.thumb .global g_pfnVectors .global Default_Handler @@ -44,6 +44,15 @@ defined in linker script */ /* end address for the .bss section. defined in linker script */ .word _ebss +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval None +*/ + .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function @@ -51,46 +60,47 @@ Reset_Handler: ldr r0, =_estack mov sp, r0 /* set stack pointer */ +/* Call the clock system initialization function.*/ + bl SystemInit + /* Copy the data segment initializers from flash to SRAM */ - movs r1, #0 + ldr r0, =_sdata + ldr r1, =_edata + ldr r2, =_sidata + movs r3, #0 b LoopCopyDataInit CopyDataInit: - ldr r3, =_sidata - ldr r3, [r3, r1] - str r3, [r0, r1] - adds r1, r1, #4 + ldr r4, [r2, r3] + str r4, [r0, r3] + adds r3, r3, #4 LoopCopyDataInit: - ldr r0, =_sdata - ldr r3, =_edata - adds r2, r0, r1 - cmp r2, r3 + adds r4, r0, r3 + cmp r4, r1 bcc CopyDataInit - ldr r2, =_sbss - b LoopFillZerobss + /* Zero fill the bss segment. */ -FillZerobss: + ldr r2, =_sbss + ldr r4, =_ebss movs r3, #0 + b LoopFillZerobss + +FillZerobss: str r3, [r2] adds r2, r2, #4 - LoopFillZerobss: - ldr r3, = _ebss - cmp r2, r3 + cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array -/* Call the application's entry point.*/ +/* Call the application s entry point.*/ bl main LoopForever: - b LoopForever - + b LoopForever .size Reset_Handler, .-Reset_Handler @@ -100,13 +110,14 @@ LoopForever: * the system state for examination by a debugger. * * @param None - * @retval : None + * @retval None */ - .section .text.Default_Handler,"ax",%progbits + .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop .size Default_Handler, .-Default_Handler + /****************************************************************************** * * The minimal vector table for a Cortex M0. Note that the proper constructs @@ -114,60 +125,58 @@ Infinite_Loop: * 0x0000.0000. * ******************************************************************************/ - .section .isr_vector,"a",%progbits + .section .isr_vector,"a",%progbits .type g_pfnVectors, %object .size g_pfnVectors, .-g_pfnVectors - g_pfnVectors: - .word _estack - .word Reset_Handler - .word NMI_Handler - .word HardFault_Handler - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word 0 - .word SVC_Handler - .word 0 - .word 0 - .word PendSV_Handler - .word SysTick_Handler - .word WWDG_IRQHandler /* Window WatchDog */ - .word PVD_IRQHandler /* PVD through EXTI Line detect */ - .word RTC_TAMP_IRQHandler /* RTC through the EXTI line */ - .word FLASH_IRQHandler /* FLASH */ - .word RCC_IRQHandler /* RCC */ - .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ - .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ - .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ - .word UCPD1_2_IRQHandler /* UCPD1, UCPD2 */ - .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ - .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ - .word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 7, DMAMUX1 overrun */ - .word ADC1_COMP_IRQHandler /* ADC1, COMP1 and COMP2 */ - .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ - .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ - .word TIM2_IRQHandler /* TIM2 */ - .word TIM3_IRQHandler /* TIM3 */ - .word TIM6_DAC_LPTIM1_IRQHandler /* TIM6, DAC and LPTIM1 */ - .word TIM7_LPTIM2_IRQHandler /* TIM7 and LPTIM2 */ - .word TIM14_IRQHandler /* TIM14 */ - .word TIM15_IRQHandler /* TIM15 */ - .word TIM16_IRQHandler /* TIM16 */ - .word TIM17_IRQHandler /* TIM17 */ - .word I2C1_IRQHandler /* I2C1 */ - .word I2C2_IRQHandler /* I2C2 */ - .word SPI1_IRQHandler /* SPI1 */ - .word SPI2_IRQHandler /* SPI2 */ - .word USART1_IRQHandler /* USART1 */ - .word USART2_IRQHandler /* USART2 */ - .word USART3_4_LPUART1_IRQHandler /* USART3, USART4 and LPUART1 */ - .word CEC_IRQHandler /* CEC */ - .word 0x55AA11EE /* Reserved for OpenBLT checksum*/ + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word 0 + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler /* Window WatchDog */ + .word 0 /* reserved */ + .word RTC_TAMP_IRQHandler /* RTC through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ + .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ + .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ + .word 0 /* reserved */ + .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ + .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ + .word DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler /* DMA1 Channel 4 to Channel 7, DMAMUX1 overrun */ + .word ADC1_IRQHandler /* ADC1 */ + .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word 0 /* reserved */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM6_IRQHandler /* TIM6 */ + .word TIM7_IRQHandler /* TIM7 */ + .word TIM14_IRQHandler /* TIM14 */ + .word TIM15_IRQHandler /* TIM15 */ + .word TIM16_IRQHandler /* TIM16 */ + .word TIM17_IRQHandler /* TIM17 */ + .word I2C1_IRQHandler /* I2C1 */ + .word I2C2_IRQHandler /* I2C2 */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_4_IRQHandler /* USART3, USART4 */ + .word 0 /* reserved for LEN */ /******************************************************************************* * @@ -195,9 +204,6 @@ g_pfnVectors: .weak WWDG_IRQHandler .thumb_set WWDG_IRQHandler,Default_Handler - .weak PVD_IRQHandler - .thumb_set PVD_IRQHandler,Default_Handler - .weak RTC_TAMP_IRQHandler .thumb_set RTC_TAMP_IRQHandler,Default_Handler @@ -216,9 +222,6 @@ g_pfnVectors: .weak EXTI4_15_IRQHandler .thumb_set EXTI4_15_IRQHandler,Default_Handler - .weak UCPD1_2_IRQHandler - .thumb_set UCPD1_2_IRQHandler,Default_Handler - .weak DMA1_Channel1_IRQHandler .thumb_set DMA1_Channel1_IRQHandler,Default_Handler @@ -228,8 +231,8 @@ g_pfnVectors: .weak DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler .thumb_set DMA1_Ch4_7_DMAMUX1_OVR_IRQHandler,Default_Handler - .weak ADC1_COMP_IRQHandler - .thumb_set ADC1_COMP_IRQHandler,Default_Handler + .weak ADC1_IRQHandler + .thumb_set ADC1_IRQHandler,Default_Handler .weak TIM1_BRK_UP_TRG_COM_IRQHandler .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler @@ -237,17 +240,14 @@ g_pfnVectors: .weak TIM1_CC_IRQHandler .thumb_set TIM1_CC_IRQHandler,Default_Handler - .weak TIM2_IRQHandler - .thumb_set TIM2_IRQHandler,Default_Handler - .weak TIM3_IRQHandler .thumb_set TIM3_IRQHandler,Default_Handler - .weak TIM6_DAC_LPTIM1_IRQHandler - .thumb_set TIM6_DAC_LPTIM1_IRQHandler,Default_Handler + .weak TIM6_IRQHandler + .thumb_set TIM6_IRQHandler,Default_Handler - .weak TIM7_LPTIM2_IRQHandler - .thumb_set TIM7_LPTIM2_IRQHandler,Default_Handler + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler .weak TIM14_IRQHandler .thumb_set TIM14_IRQHandler,Default_Handler @@ -279,11 +279,5 @@ g_pfnVectors: .weak USART2_IRQHandler .thumb_set USART2_IRQHandler,Default_Handler - .weak USART3_4_LPUART1_IRQHandler - .thumb_set USART3_4_LPUART1_IRQHandler,Default_Handler - - .weak CEC_IRQHandler - .thumb_set CEC_IRQHandler,Default_Handler - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ - + .weak USART3_4_IRQHandler + .thumb_set USART3_4_IRQHandler,Default_Handler