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This commit is contained in:
Mysteo91
2023-07-04 12:42:37 +03:00
parent 5e6d9a3165
commit 5c26bb8dff
29 changed files with 171 additions and 9647 deletions
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2
.idea/runConfigurations/OCD_mainprog.xml generated
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@@ -1,5 +1,5 @@
<component name="ProjectRunConfigurationManager"> <component name="ProjectRunConfigurationManager">
<configuration default="false" name="OCD mainprog" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="reader-boot" TARGET_NAME="reader-main-prog.elf" CONFIG_NAME="Debug" version="1" RUN_PATH="$PROJECT_DIR$/cmake-build-release/reader-main-prog_SRECORD.hex"> <configuration default="false" name="OCD mainprog" type="com.jetbrains.cidr.embedded.openocd.conf.type" factoryName="com.jetbrains.cidr.embedded.openocd.conf.factory" REDIRECT_INPUT="false" ELEVATE="false" USE_EXTERNAL_CONSOLE="false" PASS_PARENT_ENVS_2="true" PROJECT_NAME="reader-boot" TARGET_NAME="reader-main-prog.elf" CONFIG_NAME="Debug" version="1" RUN_TARGET_PROJECT_NAME="reader-boot" RUN_TARGET_NAME="reader-main-prog.elf">
<openocd version="1" gdb-port="3333" telnet-port="4444" board-config="board/st_nucleo_g0.cfg" reset-type="INIT" download-type="UPDATED_ONLY"> <openocd version="1" gdb-port="3333" telnet-port="4444" board-config="board/st_nucleo_g0.cfg" reset-type="INIT" download-type="UPDATED_ONLY">
<debugger kind="GDB" isBundled="true" /> <debugger kind="GDB" isBundled="true" />
</openocd> </openocd>

30
Boot/.mxproject
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File diff suppressed because one or more lines are too long

95
Boot/ARMCM0_STM32G0/flash.c
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@@ -31,7 +31,7 @@
****************************************************************************************/ ****************************************************************************************/
#include "boot.h" /* bootloader generic header */ #include "boot.h" /* bootloader generic header */
#include "stm32g0xx.h" /* STM32 CPU and HAL header */ #include "stm32g0xx.h" /* STM32 CPU and HAL header */
#include "flash.h"
/**************************************************************************************** /****************************************************************************************
* Macro definitions * Macro definitions
@@ -40,8 +40,7 @@
#define FLASH_INVALID_SECTOR (0xff) #define FLASH_INVALID_SECTOR (0xff)
/** \brief Value for an invalid flash address. */ /** \brief Value for an invalid flash address. */
#define FLASH_INVALID_ADDRESS (0xffffffff) #define FLASH_INVALID_ADDRESS (0xffffffff)
/** \brief Standard size of a flash block for writing. */
#define FLASH_WRITE_BLOCK_SIZE (512)
/** \brief Total numbers of sectors in array flashLayout[]. */ /** \brief Total numbers of sectors in array flashLayout[]. */
#define FLASH_TOTAL_SECTORS (sizeof(flashLayout)/sizeof(flashLayout[0])) #define FLASH_TOTAL_SECTORS (sizeof(flashLayout)/sizeof(flashLayout[0]))
/** \brief End address of the bootloader programmable flash. */ /** \brief End address of the bootloader programmable flash. */
@@ -92,11 +91,6 @@ typedef struct
* the flash block and the data that should be programmed into the flash * the flash block and the data that should be programmed into the flash
* block. The .base_addr must be a multiple of FLASH_WRITE_BLOCK_SIZE. * block. The .base_addr must be a multiple of FLASH_WRITE_BLOCK_SIZE.
*/ */
typedef struct
{
blt_addr base_addr;
blt_int8u data[FLASH_WRITE_BLOCK_SIZE];
} tFlashBlockInfo;
/**************************************************************************************** /****************************************************************************************
@@ -153,21 +147,66 @@ static blt_int32u FlashGetPage(blt_addr address);
static const tFlashSector flashLayout[] = static const tFlashSector flashLayout[] =
{ {
{ 0x08002000, 0x00800, 4}, /* flash sector 4 - reserved for bootloader */
/* { 0x08000000, 0x00800, 0}, { 0x08002800, 0x00800, 5}, /* flash sector 5 - 2kb */
{ 0x08000800, 0x00800, 1}, { 0x08003000, 0x00800, 6}, /* flash sector 6 - 2kb */
{ 0x08001000, 0x00800, 2}, { 0x08003800, 0x00800, 7}, /* flash sector 7 - 2kb */
{ 0x08001800, 0x00800, 3},*/ { 0x08004000, 0x00800, 8}, /* flash sector 8 - 2kb */
{ 0x08002000, 0x00800, 4}, /* flash sector 4 - reserved for bootloader */ { 0x08004800, 0x00800, 9}, /* flash sector 9 - 2kb */
{ 0x08002800, 0x00800, 5}, /* flash sector 5 - 2kb */ { 0x08005000, 0x00800, 10}, /* flash sector 10 - 2kb */
{ 0x08003000, 0x00800, 6}, /* flash sector 6 - 2kb */ { 0x08005800, 0x00800, 11}, /* flash sector 11 - 2kb */
{ 0x08003800, 0x00800, 7}, /* flash sector 7 - 2kb */ { 0x08006000, 0x00800, 12}, /* flash sector 12 - 2kb */
{ 0x08004000, 0x00800, 8}, /* flash sector 8 - 2kb */ { 0x08006800, 0x00800, 13}, /* flash sector 13 - 2kb */
{ 0x08004800, 0x00800, 9}, /* flash sector 9 - 2kb */ { 0x08007000, 0x00800, 14}, /* flash sector 14 - 2kb */
{ 0x08005000, 0x00800, 10}, /* flash sector 10 - 2kb */ { 0x08007800, 0x00800, 15}, /* flash sector 15 - 2kb */
{ 0x08005800, 0x00800, 11}, /* flash sector 11 - 2kb */ { 0x08008000, 0x00800, 16}, /* flash sector 9 - 2kb */
/* flash sector 7 - 2kb */ { 0x08008800, 0x00800, 17}, /* flash sector 10 - 2kb */
{ 0x08009000, 0x00800, 18}, /* flash sector 11 - 2kb */
{ 0x08009800, 0x00800, 19}, /* flash sector 12 - 2kb */
{ 0x0800A000, 0x00800, 20}, /* flash sector 13 - 2kb */
{ 0x0800A800, 0x00800, 21}, /* flash sector 14 - 2kb */
{ 0x0800B000, 0x00800, 22}, /* flash sector 15 - 2kb */
{ 0x0800B800, 0x00800, 23}, /* flash sector 8 - 2kb */
{ 0x0800C000, 0x00800, 24}, /* flash sector 9 - 2kb */
{ 0x0800C800, 0x00800, 25}, /* flash sector 10 - 2kb */
{ 0x0800D000, 0x00800, 26}, /* flash sector 11 - 2kb */
{ 0x0800D800, 0x00800, 27}, /* flash sector 12 - 2kb */
{ 0x0800E000, 0x00800, 28}, /* flash sector 13 - 2kb */
{ 0x0800E800, 0x00800, 29}, /* flash sector 14 - 2kb */
{ 0x0800F000, 0x00800, 30}, /* flash sector 15 - 2kb */
{ 0x0800F800, 0x00800, 31}, /* flash sector 8 - 2kb */
{ 0x08010000, 0x00800, 32}, /* flash sector 9 - 2kb */
{ 0x08010800, 0x00800, 33}, /* flash sector 10 - 2kb */
{ 0x08011000, 0x00800, 34}, /* flash sector 11 - 2kb */
{ 0x08011800, 0x00800, 35}, /* flash sector 12 - 2kb */
{ 0x08012000, 0x00800, 36}, /* flash sector 13 - 2kb */
{ 0x08012800, 0x00800, 37}, /* flash sector 14 - 2kb */
{ 0x08013000, 0x00800, 38}, /* flash sector 15 - 2kb */
{ 0x08013800, 0x08000, 39}, /* flash sector 17 - 32kb */
{ 0x08014000, 0x08000, 40}, /* flash sector 18 - 32kb */
{ 0x08014800, 0x08000, 41}, /* flash sector 17 - 32kb */
{ 0x08015000, 0x08000, 42}, /* flash sector 18 - 32kb */
{ 0x08015800, 0x08000, 43}, /* flash sector 17 - 32kb */
{ 0x08016000, 0x08000, 44}, /* flash sector 18 - 32kb */
{ 0x08016800, 0x08000, 45}, /* flash sector 17 - 32kb */
{ 0x08017000, 0x08000, 46}, /* flash sector 18 - 32kb */
{ 0x08017800, 0x00800, 47}, /* flash sector 4 - reserved for bootloader */
{ 0x08018000, 0x00800, 48}, /* flash sector 5 - 2kb */
{ 0x08018800, 0x00800, 49}, /* flash sector 6 - 2kb */
{ 0x08019000, 0x00800, 50}, /* flash sector 7 - 2kb */
{ 0x08019800, 0x00800, 51}, /* flash sector 8 - 2kb */
{ 0x0801A000, 0x00800, 52}, /* flash sector 9 - 2kb */
{ 0x0801A800, 0x00800, 53}, /* flash sector 10 - 2kb */
{ 0x0801B000, 0x00800, 54}, /* flash sector 11 - 2kb */
{ 0x0801B800, 0x00800, 55}, /* flash sector 12 - 2kb */
{ 0x0801C000, 0x00800, 56}, /* flash sector 13 - 2kb */
{ 0x0801C800, 0x00800, 57}, /* flash sector 14 - 2kb */
{ 0x0801D000, 0x00800, 58}, /* flash sector 15 - 2kb */
{ 0x0801D800, 0x00800, 59}, /* flash sector 4 - reserved for bootloader */
{ 0x0801E000, 0x00800, 60}, /* flash sector 5 - 2kb */
{ 0x0801E800, 0x00800, 61}, /* flash sector 6 - 2kb */
{ 0x0801F000, 0x00800, 62}, /* flash sector 7 - 2kb */
{ 0x0801F800, 0x00800, 63} /* flash sector 7 - 2kb */
}; };
#else #else
@@ -222,6 +261,16 @@ void FlashInit(void)
bootBlockInfo.base_addr = FLASH_INVALID_ADDRESS; bootBlockInfo.base_addr = FLASH_INVALID_ADDRESS;
} /*** end of FlashInit ***/ } /*** end of FlashInit ***/
/*** end of FlashInit ***/
void FlashGetBlockInfoData(blt_int8u *data, blt_int32u *len)
{
*len = *(uint32_t*)&bootBlockInfo.data[BOOT_FLASH_VECTOR_TABLE_CS_OFFSET];
for (uint16_t i = 0; i < FLASH_WRITE_BLOCK_SIZE; i++)
{
*data++ = bootBlockInfo.data[i];
}
}
/************************************************************************************//** /************************************************************************************//**
** \brief Reinitializes the flash driver. ** \brief Reinitializes the flash driver.

10
Boot/ARMCM0_STM32G0/flash.h
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@@ -39,7 +39,15 @@ blt_bool FlashWriteChecksum(void);
blt_bool FlashVerifyChecksum(void); blt_bool FlashVerifyChecksum(void);
blt_bool FlashDone(void); blt_bool FlashDone(void);
blt_addr FlashGetUserProgBaseAddress(void); blt_addr FlashGetUserProgBaseAddress(void);
void FlashGetBlockInfoData(blt_int8u *data, blt_int32u *len);
/** \brief Standard size of a flash block for writing. */
#define FLASH_WRITE_BLOCK_SIZE (512)
#define FLASH_USER_PROG_SIZE (FLASH_SIZE - (FLASH_USER_PROG_ADDRESS - 0x08000000))
typedef struct
{
blt_addr base_addr;
blt_int8u data[FLASH_WRITE_BLOCK_SIZE];
} tFlashBlockInfo;
#endif /* FLASH_H */ #endif /* FLASH_H */
/*********************************** end of flash.h ************************************/ /*********************************** end of flash.h ************************************/

6
Boot/ARMCM0_STM32G0/nvm.c
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@@ -214,6 +214,10 @@ blt_addr NvmGetUserProgBaseAddress(void)
****************************************************************************************/ ****************************************************************************************/
blt_bool NvmDone(void) blt_bool NvmDone(void)
{ {
if (FlashDone() != BLT_TRUE)
{
return BLT_FALSE;
}
#if (BOOT_NVM_HOOKS_ENABLE > 0) #if (BOOT_NVM_HOOKS_ENABLE > 0)
/* give the application's NVM driver a chance to finish up */ /* give the application's NVM driver a chance to finish up */
if (NvmDoneHook() == BLT_FALSE) if (NvmDoneHook() == BLT_FALSE)
@@ -238,7 +242,7 @@ blt_bool NvmDone(void)
#endif #endif
/* finish up internal driver operations */ /* finish up internal driver operations */
return FlashDone(); return BLT_TRUE;
} /*** end of NvmDone ***/ } /*** end of NvmDone ***/

48
Boot/App/hooks.c
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@@ -220,6 +220,32 @@ blt_bool NvmDoneHook(void)
#if (BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0) #if (BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0)
/************************************************************************************//**
** \brief Writes a checksum of the user program to non-volatile memory. This is
** performed once the entire user program has been programmed. Through
** the checksum, the bootloader can check if a valid user programming is
** present and can be started.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool NvmVerifyChecksumHook(void);
blt_bool NvmWriteChecksumHook(void)
{
blt_bool result = BLT_TRUE;
uint32_t crc = 0;
uint8_t data[FLASH_WRITE_BLOCK_SIZE] = {0};
uint32_t len;
FlashGetBlockInfoData(data, &len);
if (len > FLASH_USER_PROG_SIZE)
return BLT_FALSE;
if (NvmVerifyChecksumHook() == BLT_TRUE)
return BLT_TRUE;
else
return BLT_FALSE;
}
/************************************************************************************//** /************************************************************************************//**
** \brief Verifies the checksum, which indicates that a valid user program is ** \brief Verifies the checksum, which indicates that a valid user program is
** present and can be started. ** present and can be started.
@@ -230,8 +256,9 @@ blt_bool NvmVerifyChecksumHook(void)
{ {
uint32_t crcCalculated; uint32_t crcCalculated;
uint32_t len = *(uint32_t*)(LEN_ADDRESS); uint32_t len = *(uint32_t*)(LEN_ADDRESS);
if (len > FLASH_USER_PROG_SIZE)
return BLT_FALSE;
uint32_t crcInFlash = *(uint32_t*) (FLASH_USER_PROG_ADDRESS + len ); uint32_t crcInFlash = *(uint32_t*) (FLASH_USER_PROG_ADDRESS + len );
if (calculateROM_CRC32(FLASH_AREA_FULLPROG, &crcCalculated) == BLT_TRUE) if (calculateROM_CRC32(FLASH_AREA_FULLPROG, &crcCalculated) == BLT_TRUE)
{ {
if (crcCalculated == crcInFlash ) if (crcCalculated == crcInFlash )
@@ -243,25 +270,6 @@ blt_bool NvmVerifyChecksumHook(void)
} /*** end of NvmVerifyChecksum ***/ } /*** end of NvmVerifyChecksum ***/
/************************************************************************************//**
** \brief Writes a checksum of the user program to non-volatile memory. This is
** performed once the entire user program has been programmed. Through
** the checksum, the bootloader can check if a valid user programming is
** present and can be started.
** \return BLT_TRUE if successful, BLT_FALSE otherwise.
**
****************************************************************************************/
blt_bool NvmWriteChecksumHook(void)
{
blt_bool result = BLT_TRUE;
uint32_t crc = 0;
result = calculateROM_CRC32(FLASH_AREA_FULLPROG, &crc);
if (result == BLT_TRUE)
result = FlashWrite(FLASH_USER_PROG_ADDRESS + BOOT_FLASH_VECTOR_TABLE_CS_OFFSET + 1, sizeof (blt_addr), (blt_int8u*) &crc);
else
return result;
return result;
}
#endif /* BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0 */ #endif /* BOOT_NVM_CHECKSUM_HOOKS_ENABLE > 0 */

14
Boot/Boot.ioc
View File

@@ -11,9 +11,8 @@ Mcu.IP0=CRC
Mcu.IP1=NVIC Mcu.IP1=NVIC
Mcu.IP2=RCC Mcu.IP2=RCC
Mcu.IP3=SYS Mcu.IP3=SYS
Mcu.IP4=USART1 Mcu.IP4=USART2
Mcu.IP5=USART2 Mcu.IPNb=5
Mcu.IPNb=6
Mcu.Name=STM32G070CBTx Mcu.Name=STM32G070CBTx
Mcu.Package=LQFP48 Mcu.Package=LQFP48
Mcu.Pin0=PF0-OSC_IN (PF0) Mcu.Pin0=PF0-OSC_IN (PF0)
@@ -41,7 +40,6 @@ NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true NVIC.SVC_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true
NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true\:false NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true\:false
NVIC.USART1_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true NVIC.USART2_IRQn=true\:0\:0\:false\:false\:true\:true\:true\:true
PA11\ [PA9].Locked=true PA11\ [PA9].Locked=true
PA11\ [PA9].Signal=I2C2_SCL PA11\ [PA9].Signal=I2C2_SCL
@@ -58,10 +56,8 @@ PA5.GPIO_Label=READER_EN
PA5.Locked=true PA5.Locked=true
PA5.Signal=GPIO_Output PA5.Signal=GPIO_Output
PB6.Locked=true PB6.Locked=true
PB6.Mode=Asynchronous
PB6.Signal=USART1_TX PB6.Signal=USART1_TX
PB7.Locked=true PB7.Locked=true
PB7.Mode=Asynchronous
PB7.Signal=USART1_RX PB7.Signal=USART1_RX
PF0-OSC_IN\ (PF0).Mode=HSE-External-Oscillator PF0-OSC_IN\ (PF0).Mode=HSE-External-Oscillator
PF0-OSC_IN\ (PF0).Signal=RCC_OSC_IN PF0-OSC_IN\ (PF0).Signal=RCC_OSC_IN
@@ -96,7 +92,7 @@ ProjectManager.StackSize=0x400
ProjectManager.TargetToolchain=STM32CubeIDE ProjectManager.TargetToolchain=STM32CubeIDE
ProjectManager.ToolChainLocation= ProjectManager.ToolChainLocation=
ProjectManager.UnderRoot=true ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_USART1_UART_Init-USART1-false-LL-true,4-MX_USART2_UART_Init-USART2-false-LL-true,5-MX_CRC_Init-CRC-false-LL-true ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-LL-false,2-MX_GPIO_Init-GPIO-false-LL-true,3-MX_USART2_UART_Init-USART2-false-LL-true,4-MX_CRC_Init-CRC-false-HAL-true
RCC.ADCFreq_Value=64000000 RCC.ADCFreq_Value=64000000
RCC.AHBFreq_Value=64000000 RCC.AHBFreq_Value=64000000
RCC.APBFreq_Value=64000000 RCC.APBFreq_Value=64000000
@@ -124,10 +120,6 @@ RCC.USART1Freq_Value=64000000
RCC.USART2Freq_Value=64000000 RCC.USART2Freq_Value=64000000
RCC.VCOInputFreq_Value=16000000 RCC.VCOInputFreq_Value=16000000
RCC.VCOOutputFreq_Value=128000000 RCC.VCOOutputFreq_Value=128000000
USART1.BaudRate=9600
USART1.IPParameters=VirtualMode-Asynchronous,BaudRate,SwapParam
USART1.SwapParam=ADVFEATURE_SWAP_ENABLE
USART1.VirtualMode-Asynchronous=VM_ASYNC
USART2.BaudRate=9600 USART2.BaudRate=9600
USART2.IPParameters=VirtualMode-Asynchronous,BaudRate USART2.IPParameters=VirtualMode-Asynchronous,BaudRate
USART2.VirtualMode-Asynchronous=VM_ASYNC USART2.VirtualMode-Asynchronous=VM_ASYNC

50
Boot/Core/Inc/i2c.h
View File

@@ -1,50 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file i2c.h
* @brief This file contains all the function prototypes for
* the i2c.c file
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __I2C_H__
#define __I2C_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_I2C2_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __I2C_H__ */

4
Boot/Core/Inc/main.h
View File

@@ -30,7 +30,6 @@ extern "C" {
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32g0xx_hal.h" #include "stm32g0xx_hal.h"
#include "stm32g0xx_ll_i2c.h"
#include "stm32g0xx_ll_rcc.h" #include "stm32g0xx_ll_rcc.h"
#include "stm32g0xx_ll_bus.h" #include "stm32g0xx_ll_bus.h"
#include "stm32g0xx_ll_system.h" #include "stm32g0xx_ll_system.h"
@@ -39,7 +38,6 @@ extern "C" {
#include "stm32g0xx_ll_utils.h" #include "stm32g0xx_ll_utils.h"
#include "stm32g0xx_ll_pwr.h" #include "stm32g0xx_ll_pwr.h"
#include "stm32g0xx_ll_dma.h" #include "stm32g0xx_ll_dma.h"
#include "stm32g0xx_ll_tim.h"
#include "stm32g0xx_ll_usart.h" #include "stm32g0xx_ll_usart.h"
#include "stm32g0xx_ll_gpio.h" #include "stm32g0xx_ll_gpio.h"
@@ -73,8 +71,6 @@ void Error_Handler(void);
/* Private defines -----------------------------------------------------------*/ /* Private defines -----------------------------------------------------------*/
#define READER_EN_Pin LL_GPIO_PIN_5 #define READER_EN_Pin LL_GPIO_PIN_5
#define READER_EN_GPIO_Port GPIOA #define READER_EN_GPIO_Port GPIOA
#define ZUMMER_PINOUT_Pin LL_GPIO_PIN_5
#define ZUMMER_PINOUT_GPIO_Port GPIOB
/* USER CODE BEGIN Private defines */ /* USER CODE BEGIN Private defines */

1
Boot/Core/Inc/stm32g0xx_it.h
View File

@@ -52,7 +52,6 @@ void HardFault_Handler(void);
void SVC_Handler(void); void SVC_Handler(void);
void PendSV_Handler(void); void PendSV_Handler(void);
void SysTick_Handler(void); void SysTick_Handler(void);
void USART1_IRQHandler(void);
void USART2_IRQHandler(void); void USART2_IRQHandler(void);
/* USER CODE BEGIN EFP */ /* USER CODE BEGIN EFP */

50
Boot/Core/Inc/tim.h
View File

@@ -1,50 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file tim.h
* @brief This file contains all the function prototypes for
* the tim.c file
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __TIM_H__
#define __TIM_H__
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
void MX_TIM3_Init(void);
/* USER CODE BEGIN Prototypes */
/* USER CODE END Prototypes */
#ifdef __cplusplus
}
#endif
#endif /* __TIM_H__ */

1
Boot/Core/Inc/usart.h
View File

@@ -36,7 +36,6 @@ extern "C" {
/* USER CODE END Private defines */ /* USER CODE END Private defines */
void MX_USART1_UART_Init(void);
void MX_USART2_UART_Init(void); void MX_USART2_UART_Init(void);
/* USER CODE BEGIN Prototypes */ /* USER CODE BEGIN Prototypes */

2
Boot/Core/Src/crc.c
View File

@@ -26,8 +26,6 @@
/* CRC init function */ /* CRC init function */
void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle) void HAL_CRC_MspInit(CRC_HandleTypeDef* crcHandle)
{ {

75
Boot/Core/Src/gpio.c
View File

@@ -38,11 +38,13 @@
* Output * Output
* EVENT_OUT * EVENT_OUT
* EXTI * EXTI
PA11 [PA9] ------> I2C2_SCL
PB6 ------> USART1_TX
PB7 ------> USART1_RX
*/ */
void MX_GPIO_Init(void) void MX_GPIO_Init(void)
{ {
LL_EXTI_InitTypeDef EXTI_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */ /* GPIO Ports Clock Enable */
@@ -50,55 +52,9 @@ void MX_GPIO_Init(void)
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA); LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB); LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
/**/
LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_4);
/**/ /**/
LL_GPIO_ResetOutputPin(READER_EN_GPIO_Port, READER_EN_Pin); LL_GPIO_ResetOutputPin(READER_EN_GPIO_Port, READER_EN_Pin);
/**/
LL_GPIO_ResetOutputPin(ZUMMER_PINOUT_GPIO_Port, ZUMMER_PINOUT_Pin);
/**/
LL_EXTI_SetEXTISource(LL_EXTI_CONFIG_PORTA, LL_EXTI_CONFIG_LINE0);
/**/
LL_EXTI_SetEXTISource(LL_EXTI_CONFIG_PORTA, LL_EXTI_CONFIG_LINE1);
/**/
EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_0;
EXTI_InitStruct.LineCommand = ENABLE;
EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
LL_EXTI_Init(&EXTI_InitStruct);
/**/
EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_1;
EXTI_InitStruct.LineCommand = ENABLE;
EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;
EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_RISING;
LL_EXTI_Init(&EXTI_InitStruct);
/**/
LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_0, LL_GPIO_PULL_NO);
/**/
LL_GPIO_SetPinPull(GPIOA, LL_GPIO_PIN_1, LL_GPIO_PULL_NO);
/**/
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_0, LL_GPIO_MODE_INPUT);
/**/
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_1, LL_GPIO_MODE_INPUT);
/**/
GPIO_InitStruct.Pin = LL_GPIO_PIN_4;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/**/ /**/
GPIO_InitStruct.Pin = READER_EN_Pin; GPIO_InitStruct.Pin = READER_EN_Pin;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;
@@ -108,12 +64,31 @@ void MX_GPIO_Init(void)
LL_GPIO_Init(READER_EN_GPIO_Port, &GPIO_InitStruct); LL_GPIO_Init(READER_EN_GPIO_Port, &GPIO_InitStruct);
/**/ /**/
GPIO_InitStruct.Pin = ZUMMER_PINOUT_Pin; GPIO_InitStruct.Pin = LL_GPIO_PIN_11;
GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/**/
GPIO_InitStruct.Pin = LL_GPIO_PIN_6;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
LL_GPIO_Init(ZUMMER_PINOUT_GPIO_Port, &GPIO_InitStruct); GPIO_InitStruct.Alternate = LL_GPIO_AF_0;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/**/
GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_0;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
} }

90
Boot/Core/Src/i2c.c
View File

@@ -1,90 +0,0 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file i2c.c
* @brief This file provides code for the configuration
* of the I2C instances.
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "i2c.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* I2C2 init function */
void MX_I2C2_Init(void)
{
/* USER CODE BEGIN I2C2_Init 0 */
/* USER CODE END I2C2_Init 0 */
LL_I2C_InitTypeDef I2C_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOA);
/**I2C2 GPIO Configuration
PA11 [PA9] ------> I2C2_SCL
PA12 [PA10] ------> I2C2_SDA
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_11;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_6;
LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2);
/* USER CODE BEGIN I2C2_Init 1 */
/* USER CODE END I2C2_Init 1 */
/** I2C Initialization
*/
I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C;
I2C_InitStruct.Timing = 0x10707DBC;
I2C_InitStruct.AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
I2C_InitStruct.DigitalFilter = 0;
I2C_InitStruct.OwnAddress1 = 0;
I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK;
I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
LL_I2C_Init(I2C2, &I2C_InitStruct);
LL_I2C_EnableAutoEndMode(I2C2);
LL_I2C_SetOwnAddress2(I2C2, 0, LL_I2C_OWNADDRESS2_NOMASK);
LL_I2C_DisableOwnAddress2(I2C2);
LL_I2C_DisableGeneralCall(I2C2);
LL_I2C_EnableClockStretching(I2C2);
/* USER CODE BEGIN I2C2_Init 2 */
/* USER CODE END I2C2_Init 2 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

4
Boot/Core/Src/main.c
View File

@@ -20,8 +20,6 @@
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "main.h" #include "main.h"
#include "crc.h" #include "crc.h"
#include "i2c.h"
#include "tim.h"
#include "usart.h" #include "usart.h"
#include "gpio.h" #include "gpio.h"
@@ -89,8 +87,6 @@ int main(void)
/* Initialize all configured peripherals */ /* Initialize all configured peripherals */
MX_GPIO_Init(); MX_GPIO_Init();
MX_USART1_UART_Init();
MX_USART2_UART_Init(); MX_USART2_UART_Init();
MX_CRC_Init(); MX_CRC_Init();
/* USER CODE BEGIN 2 */ /* USER CODE BEGIN 2 */

13
Boot/Core/Src/stm32g0xx_it.c
View File

@@ -139,19 +139,6 @@ void SysTick_Handler(void)
/* please refer to the startup file (startup_stm32g0xx.s). */ /* please refer to the startup file (startup_stm32g0xx.s). */
/******************************************************************************/ /******************************************************************************/
/**
* @brief This function handles USART1 global interrupt / USART1 wake-up interrupt through EXTI line 25.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/** /**
* @brief This function handles USART2 global interrupt / USART2 wake-up interrupt through EXTI line 26. * @brief This function handles USART2 global interrupt / USART2 wake-up interrupt through EXTI line 26.
*/ */

55
Boot/Core/Src/tim.c
View File

@@ -1,55 +0,0 @@
/* USER CODE BEGIN Header */
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "tim.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* TIM3 init function */
void MX_TIM3_Init(void)
{
/* USER CODE BEGIN TIM3_Init 0 */
/* USER CODE END TIM3_Init 0 */
LL_TIM_InitTypeDef TIM_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
/* Peripheral clock enable */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM3);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
/**TIM3 GPIO Configuration
PB4 ------> TIM3_CH1
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_4;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_1;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN TIM3_Init 1 */
/* USER CODE END TIM3_Init 1 */
TIM_InitStruct.Prescaler = 0;
TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
TIM_InitStruct.Autoreload = 65535;
TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
LL_TIM_Init(TIM3, &TIM_InitStruct);
LL_TIM_DisableARRPreload(TIM3);
LL_TIM_SetTriggerOutput(TIM3, LL_TIM_TRGO_RESET);
LL_TIM_DisableMasterSlaveMode(TIM3);
LL_TIM_IC_SetActiveInput(TIM3, LL_TIM_CHANNEL_CH1, LL_TIM_ACTIVEINPUT_DIRECTTI);
LL_TIM_IC_SetPrescaler(TIM3, LL_TIM_CHANNEL_CH1, LL_TIM_ICPSC_DIV1);
LL_TIM_IC_SetFilter(TIM3, LL_TIM_CHANNEL_CH1, LL_TIM_IC_FILTER_FDIV1);
LL_TIM_IC_SetPolarity(TIM3, LL_TIM_CHANNEL_CH1, LL_TIM_IC_POLARITY_RISING);
/* USER CODE BEGIN TIM3_Init 2 */
/* USER CODE END TIM3_Init 2 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */

76
Boot/Core/Src/usart.c
View File

@@ -24,82 +24,6 @@
/* USER CODE END 0 */ /* USER CODE END 0 */
/* USART1 init function */
void MX_USART1_UART_Init(void)
{
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
LL_USART_InitTypeDef USART_InitStruct = {0};
LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
LL_RCC_SetUSARTClockSource(LL_RCC_USART1_CLKSOURCE_PCLK1);
/* Peripheral clock enable */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
LL_IOP_GRP1_EnableClock(LL_IOP_GRP1_PERIPH_GPIOB);
/**USART1 GPIO Configuration
PB6 ------> USART1_TX
PB7 ------> USART1_RX
*/
GPIO_InitStruct.Pin = LL_GPIO_PIN_6;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_0;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
GPIO_InitStruct.Alternate = LL_GPIO_AF_0;
LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USART1 interrupt Init */
NVIC_SetPriority(USART1_IRQn, 0);
NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
USART_InitStruct.PrescalerValue = LL_USART_PRESCALER_DIV1;
USART_InitStruct.BaudRate = 9600;
USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
USART_InitStruct.Parity = LL_USART_PARITY_NONE;
USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
LL_USART_Init(USART1, &USART_InitStruct);
LL_USART_SetTXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8);
LL_USART_SetRXFIFOThreshold(USART1, LL_USART_FIFOTHRESHOLD_1_8);
LL_USART_DisableFIFO(USART1);
LL_USART_SetTXRXSwap(USART1, LL_USART_TXRX_SWAPPED);
LL_USART_ConfigAsyncMode(USART1);
/* USER CODE BEGIN WKUPType USART1 */
/* USER CODE END WKUPType USART1 */
LL_USART_Enable(USART1);
/* Polling USART1 initialisation */
while((!(LL_USART_IsActiveFlag_TEACK(USART1))) || (!(LL_USART_IsActiveFlag_REACK(USART1))))
{
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
/* USART2 init function */ /* USART2 init function */
void MX_USART2_UART_Init(void) void MX_USART2_UART_Init(void)

2272
Boot/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_i2c.h
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File diff suppressed because it is too large Load Diff

5275
Boot/Drivers/STM32G0xx_HAL_Driver/Inc/stm32g0xx_ll_tim.h
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File diff suppressed because it is too large Load Diff

234
Boot/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_i2c.c
View File

@@ -1,234 +0,0 @@
/**
******************************************************************************
* @file stm32g0xx_ll_i2c.c
* @author MCD Application Team
* @brief I2C LL module driver.
******************************************************************************
* @attention
*
* Copyright (c) 2018 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
#if defined(USE_FULL_LL_DRIVER)
/* Includes ------------------------------------------------------------------*/
#include "stm32g0xx_ll_i2c.h"
#include "stm32g0xx_ll_bus.h"
#ifdef USE_FULL_ASSERT
#include "stm32_assert.h"
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
/** @addtogroup STM32G0xx_LL_Driver
* @{
*/
#if defined (I2C1) || defined (I2C2) || defined (I2C3)
/** @defgroup I2C_LL I2C
* @{
*/
/* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup I2C_LL_Private_Macros
* @{
*/
#define IS_LL_I2C_PERIPHERAL_MODE(__VALUE__) (((__VALUE__) == LL_I2C_MODE_I2C) || \
((__VALUE__) == LL_I2C_MODE_SMBUS_HOST) || \
((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE) || \
((__VALUE__) == LL_I2C_MODE_SMBUS_DEVICE_ARP))
#define IS_LL_I2C_ANALOG_FILTER(__VALUE__) (((__VALUE__) == LL_I2C_ANALOGFILTER_ENABLE) || \
((__VALUE__) == LL_I2C_ANALOGFILTER_DISABLE))
#define IS_LL_I2C_DIGITAL_FILTER(__VALUE__) ((__VALUE__) <= 0x0000000FU)
#define IS_LL_I2C_OWN_ADDRESS1(__VALUE__) ((__VALUE__) <= 0x000003FFU)
#define IS_LL_I2C_TYPE_ACKNOWLEDGE(__VALUE__) (((__VALUE__) == LL_I2C_ACK) || \
((__VALUE__) == LL_I2C_NACK))
#define IS_LL_I2C_OWN_ADDRSIZE(__VALUE__) (((__VALUE__) == LL_I2C_OWNADDRESS1_7BIT) || \
((__VALUE__) == LL_I2C_OWNADDRESS1_10BIT))
/**
* @}
*/
/* Private function prototypes -----------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup I2C_LL_Exported_Functions
* @{
*/
/** @addtogroup I2C_LL_EF_Init
* @{
*/
/**
* @brief De-initialize the I2C registers to their default reset values.
* @param I2Cx I2C Instance.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: I2C registers are de-initialized
* - ERROR: I2C registers are not de-initialized
*/
ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx)
{
ErrorStatus status = SUCCESS;
/* Check the I2C Instance I2Cx */
assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
if (I2Cx == I2C1)
{
/* Force reset of I2C clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C1);
/* Release reset of I2C clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C1);
}
else if (I2Cx == I2C2)
{
/* Force reset of I2C clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C2);
/* Release reset of I2C clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C2);
}
#if defined(I2C3)
else if (I2Cx == I2C3)
{
/* Force reset of I2C clock */
LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_I2C3);
/* Release reset of I2C clock */
LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_I2C3);
}
#endif /* I2C3 */
else
{
status = ERROR;
}
return status;
}
/**
* @brief Initialize the I2C registers according to the specified parameters in I2C_InitStruct.
* @param I2Cx I2C Instance.
* @param I2C_InitStruct pointer to a @ref LL_I2C_InitTypeDef structure.
* @retval An ErrorStatus enumeration value:
* - SUCCESS: I2C registers are initialized
* - ERROR: Not applicable
*/
ErrorStatus LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct)
{
/* Check the I2C Instance I2Cx */
assert_param(IS_I2C_ALL_INSTANCE(I2Cx));
/* Check the I2C parameters from I2C_InitStruct */
assert_param(IS_LL_I2C_PERIPHERAL_MODE(I2C_InitStruct->PeripheralMode));
assert_param(IS_LL_I2C_ANALOG_FILTER(I2C_InitStruct->AnalogFilter));
assert_param(IS_LL_I2C_DIGITAL_FILTER(I2C_InitStruct->DigitalFilter));
assert_param(IS_LL_I2C_OWN_ADDRESS1(I2C_InitStruct->OwnAddress1));
assert_param(IS_LL_I2C_TYPE_ACKNOWLEDGE(I2C_InitStruct->TypeAcknowledge));
assert_param(IS_LL_I2C_OWN_ADDRSIZE(I2C_InitStruct->OwnAddrSize));
/* Disable the selected I2Cx Peripheral */
LL_I2C_Disable(I2Cx);
/*---------------------------- I2Cx CR1 Configuration ------------------------
* Configure the analog and digital noise filters with parameters :
* - AnalogFilter: I2C_CR1_ANFOFF bit
* - DigitalFilter: I2C_CR1_DNF[3:0] bits
*/
LL_I2C_ConfigFilters(I2Cx, I2C_InitStruct->AnalogFilter, I2C_InitStruct->DigitalFilter);
/*---------------------------- I2Cx TIMINGR Configuration --------------------
* Configure the SDA setup, hold time and the SCL high, low period with parameter :
* - Timing: I2C_TIMINGR_PRESC[3:0], I2C_TIMINGR_SCLDEL[3:0], I2C_TIMINGR_SDADEL[3:0],
* I2C_TIMINGR_SCLH[7:0] and I2C_TIMINGR_SCLL[7:0] bits
*/
LL_I2C_SetTiming(I2Cx, I2C_InitStruct->Timing);
/* Enable the selected I2Cx Peripheral */
LL_I2C_Enable(I2Cx);
/*---------------------------- I2Cx OAR1 Configuration -----------------------
* Disable, Configure and Enable I2Cx device own address 1 with parameters :
* - OwnAddress1: I2C_OAR1_OA1[9:0] bits
* - OwnAddrSize: I2C_OAR1_OA1MODE bit
*/
LL_I2C_DisableOwnAddress1(I2Cx);
LL_I2C_SetOwnAddress1(I2Cx, I2C_InitStruct->OwnAddress1, I2C_InitStruct->OwnAddrSize);
/* OwnAdress1 == 0 is reserved for General Call address */
if (I2C_InitStruct->OwnAddress1 != 0U)
{
LL_I2C_EnableOwnAddress1(I2Cx);
}
/*---------------------------- I2Cx MODE Configuration -----------------------
* Configure I2Cx peripheral mode with parameter :
* - PeripheralMode: I2C_CR1_SMBDEN and I2C_CR1_SMBHEN bits
*/
LL_I2C_SetMode(I2Cx, I2C_InitStruct->PeripheralMode);
/*---------------------------- I2Cx CR2 Configuration ------------------------
* Configure the ACKnowledge or Non ACKnowledge condition
* after the address receive match code or next received byte with parameter :
* - TypeAcknowledge: I2C_CR2_NACK bit
*/
LL_I2C_AcknowledgeNextData(I2Cx, I2C_InitStruct->TypeAcknowledge);
return SUCCESS;
}
/**
* @brief Set each @ref LL_I2C_InitTypeDef field to default value.
* @param I2C_InitStruct Pointer to a @ref LL_I2C_InitTypeDef structure.
* @retval None
*/
void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct)
{
/* Set I2C_InitStruct fields to default values */
I2C_InitStruct->PeripheralMode = LL_I2C_MODE_I2C;
I2C_InitStruct->Timing = 0U;
I2C_InitStruct->AnalogFilter = LL_I2C_ANALOGFILTER_ENABLE;
I2C_InitStruct->DigitalFilter = 0U;
I2C_InitStruct->OwnAddress1 = 0U;
I2C_InitStruct->TypeAcknowledge = LL_I2C_NACK;
I2C_InitStruct->OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
}
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* I2C1 || I2C2 || I2C3 */
/**
* @}
*/
#endif /* USE_FULL_LL_DRIVER */

1369
Boot/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_ll_tim.c
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File diff suppressed because it is too large Load Diff

1
Boot/STM32G070CBTX_FLASH.ld
View File

@@ -47,7 +47,6 @@ MEMORY
{ {
RAM (xrw) : ORIGIN = 0x200000C0, LENGTH = 36K - 192 RAM (xrw) : ORIGIN = 0x200000C0, LENGTH = 36K - 192
BOOT_PROG_FLASH_AREA(rx) : ORIGIN = _flash_boot_address , LENGTH = _flash_boot_size BOOT_PROG_FLASH_AREA(rx) : ORIGIN = _flash_boot_address , LENGTH = _flash_boot_size
FLASH_SUPPORTING_AREA(rx) : ORIGIN = _flash_supporting_area_address , LENGTH = _flash_supporting_area_size
} }
/* Sections */ /* Sections */

4
CMakeLists.txt
View File

@@ -30,10 +30,10 @@ else()
set(MEM_MAP_FILE "memory_map.inc") set(MEM_MAP_FILE "memory_map.inc")
if ("${CMAKE_BUILD_TYPE}" STREQUAL "Debug" AND NOT BOOT) if ("${CMAKE_BUILD_TYPE}" STREQUAL "Debug" AND NOT BOOT)
set(MEM_MAP_FILE_DEBUG "memory_map_debug.inc") set(MEM_MAP_FILE_DEBUG "memory_map_debug.inc")
FUNC_CREATE_MEMORY_MAP("${MEM_MAP_FILE_DEBUG}") FUNC_CREATE_MEMORY_MAP("${MEM_MAP_FILE_DEBUG}" "128" "0" "4")
else() else()
set(MEM_MAP_FILE "memory_map.inc") set(MEM_MAP_FILE "memory_map.inc")
FUNC_CREATE_MEMORY_MAP("${MEM_MAP_FILE}" ) FUNC_CREATE_MEMORY_MAP("${MEM_MAP_FILE}" "128" "8" "4" )
endif() endif()
math(EXPR LEN_ADDRESS "${FLASH_MAIN_ADDRESS} + ${LEN_OFFSET}" OUTPUT_FORMAT HEXADECIMAL) math(EXPR LEN_ADDRESS "${FLASH_MAIN_ADDRESS} + ${LEN_OFFSET}" OUTPUT_FORMAT HEXADECIMAL)
add_compile_definitions("PAGE_SIZE=0x0800") add_compile_definitions("PAGE_SIZE=0x0800")

23
cmake_func/CMakeLists.txt
View File

@@ -1,16 +1,11 @@
function(FUNC_CREATE_MEMORY_MAP filename) function(FUNC_CREATE_MEMORY_MAP filename flash_size boot_size eeprom_size)
#memory map for linker #memory map for linker
SET(MEM_MAP_FILE "${filename}" ) SET(MEM_MAP_FILE "${filename}" )
set(FLASH_SIZE 128*1024) set(FLASH_SIZE ${flash_size}*1024)
MATH(EXPR FLASH_SIZE "${FLASH_SIZE}") MATH(EXPR FLASH_SIZE "${FLASH_SIZE}")
if ("${CMAKE_BUILD_TYPE}" STREQUAL "Debug" AND NOT BOOT) MATH(EXPR FLASH_BOOT_SIZE "${boot_size}*1024" OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR FLASH_BOOT_SIZE "0*1024" OUTPUT_FORMAT HEXADECIMAL) MATH(EXPR FLASH_EEPROM_EMU_SIZE "${eeprom_size}*1024" OUTPUT_FORMAT HEXADECIMAL)
else() MATH(EXPR FLASH_MAIN_PROG_SIZE "${FLASH_SIZE} - ${FLASH_BOOT_SIZE} - ${FLASH_EEPROM_EMU_SIZE} " OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR FLASH_BOOT_SIZE "8*1024" OUTPUT_FORMAT HEXADECIMAL)
endif()
MATH(EXPR FLASH_SUPPORTING_AREA_SIZE "4" OUTPUT_FORMAT HEXADECIMAL) #SUPPORTING AREA CONSIST CRC32 of FLASH_AREA
MATH(EXPR FLASH_EEPROM_EMU_SIZE "4*1024" OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR FLASH_MAIN_PROG_SIZE "${FLASH_SIZE} - ${FLASH_BOOT_SIZE} - ${FLASH_EEPROM_EMU_SIZE} - ${FLASH_SUPPORTING_AREA_SIZE}" OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR FLASH_SIZE_CALC "${FLASH_BOOT_SIZE} + ${FLASH_MAIN_PROG_SIZE} + ${FLASH_SUPPORTING_AREA_SIZE} + ${FLASH_EEPROM_EMU_SIZE}") MATH(EXPR FLASH_SIZE_CALC "${FLASH_BOOT_SIZE} + ${FLASH_MAIN_PROG_SIZE} + ${FLASH_SUPPORTING_AREA_SIZE} + ${FLASH_EEPROM_EMU_SIZE}")
if (${FLASH_SIZE_CALC} GREATER ${FLASH_SIZE} ) if (${FLASH_SIZE_CALC} GREATER ${FLASH_SIZE} )
message(FATAL_ERROR "FLASH_SIZE in MCU - ${FLASH_SIZE} bytes less than CALCULATED_SIZE ${FLASH_SIZE_CALC} bytes") message(FATAL_ERROR "FLASH_SIZE in MCU - ${FLASH_SIZE} bytes less than CALCULATED_SIZE ${FLASH_SIZE_CALC} bytes")
@@ -21,15 +16,12 @@ function(FUNC_CREATE_MEMORY_MAP filename)
MATH(EXPR FLASH_START_ADDRESS "0x08000000" OUTPUT_FORMAT HEXADECIMAL) MATH(EXPR FLASH_START_ADDRESS "0x08000000" OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR FLASH_BOOT_START_ADDRESS "${FLASH_START_ADDRESS}" OUTPUT_FORMAT HEXADECIMAL) MATH(EXPR FLASH_BOOT_START_ADDRESS "${FLASH_START_ADDRESS}" OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR FLASH_MAIN_PROG_START_ADDRESS "${FLASH_START_ADDRESS} + ${FLASH_BOOT_SIZE}" OUTPUT_FORMAT HEXADECIMAL) MATH(EXPR FLASH_MAIN_PROG_START_ADDRESS "${FLASH_START_ADDRESS} + ${FLASH_BOOT_SIZE}" OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR FLASH_MAIN_PROG_END_ADDRESS "${FLASH_MAIN_PROG_START_ADDRESS} + ${FLASH_MAIN_PROG_SIZE} - ${FLASH_SUPPORTING_AREA_SIZE}" OUTPUT_FORMAT HEXADECIMAL) MATH(EXPR FLASH_MAIN_PROG_END_ADDRESS "${FLASH_MAIN_PROG_START_ADDRESS} + ${FLASH_MAIN_PROG_SIZE} " OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR FLASH_EEPROM_EMU_START_ADDRESS "${FLASH_START_ADDRESS} + ${FLASH_SIZE} - ${FLASH_EEPROM_EMU_SIZE}" OUTPUT_FORMAT HEXADECIMAL) MATH(EXPR FLASH_EEPROM_EMU_START_ADDRESS "${FLASH_START_ADDRESS} + ${FLASH_SIZE} - ${FLASH_EEPROM_EMU_SIZE}" OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR FLASH_SUPPORTING_AREA_ADDRESS "${FLASH_EEPROM_EMU_START_ADDRESS} - ${FLASH_SUPPORTING_AREA_SIZE}" OUTPUT_FORMAT HEXADECIMAL)
MATH(EXPR EEPROM_EMU_START_ADDRESS "${FLASH_EEPROM_EMU_START_ADDRESS}" OUTPUT_FORMAT HEXADECIMAL) MATH(EXPR EEPROM_EMU_START_ADDRESS "${FLASH_EEPROM_EMU_START_ADDRESS}" OUTPUT_FORMAT HEXADECIMAL)
file(WRITE "${MEM_MAP_FILE}" " file(WRITE "${MEM_MAP_FILE}" "
_flash_eeprom_emu_size = ${FLASH_EEPROM_EMU_SIZE}; _flash_eeprom_emu_size = ${FLASH_EEPROM_EMU_SIZE};
_flash_eeprom_emu_address = ${FLASH_EEPROM_EMU_START_ADDRESS}; _flash_eeprom_emu_address = ${FLASH_EEPROM_EMU_START_ADDRESS};
_flash_supporting_area_size = ${FLASH_SUPPORTING_AREA_SIZE};
_flash_supporting_area_address = ${FLASH_SUPPORTING_AREA_ADDRESS};
_flash_main_prog_size = ${FLASH_MAIN_PROG_SIZE}; _flash_main_prog_size = ${FLASH_MAIN_PROG_SIZE};
_flash_main_prog_address = ${FLASH_MAIN_PROG_START_ADDRESS}; _flash_main_prog_address = ${FLASH_MAIN_PROG_START_ADDRESS};
_flash_boot_size = ${FLASH_BOOT_SIZE}; _flash_boot_size = ${FLASH_BOOT_SIZE};
@@ -37,7 +29,6 @@ function(FUNC_CREATE_MEMORY_MAP filename)
") ")
MATH(EXPR CRC32_USER_AREA_ADDRESS "${FLASH_MAIN_PROG_END_ADDRESS}" OUTPUT_FORMAT HEXADECIMAL) MATH(EXPR CRC32_USER_AREA_ADDRESS "${FLASH_MAIN_PROG_END_ADDRESS}" OUTPUT_FORMAT HEXADECIMAL)
message(${CRC32_USER_AREA_ADDRESS}) message(${CRC32_USER_AREA_ADDRESS})
add_compile_definitions("EEPROM_START_ADDRESS=${FLASH_EEPROM_EMU_START_ADDRESS}" "CRC_ADDRESS=${FLASH_SUPPORTING_AREA_ADDRESS}" "FLASH_USER_PROG_ADDRESS=${FLASH_MAIN_PROG_START_ADDRESS}") add_compile_definitions("EEPROM_START_ADDRESS=${FLASH_EEPROM_EMU_START_ADDRESS}" "FLASH_USER_PROG_ADDRESS=${FLASH_MAIN_PROG_START_ADDRESS}")
set(CRC_ADDRESS ${FLASH_SUPPORTING_AREA_ADDRESS} PARENT_SCOPE)
set(FLASH_MAIN_ADDRESS ${FLASH_MAIN_PROG_START_ADDRESS} PARENT_SCOPE) set(FLASH_MAIN_ADDRESS ${FLASH_MAIN_PROG_START_ADDRESS} PARENT_SCOPE)
endfunction() endfunction()

4
memory_map.inc
View File

@@ -1,9 +1,7 @@
_flash_eeprom_emu_size = 0x1000; _flash_eeprom_emu_size = 0x1000;
_flash_eeprom_emu_address = 0x801f000; _flash_eeprom_emu_address = 0x801f000;
_flash_supporting_area_size = 0x4; _flash_main_prog_size = 0x1d000;
_flash_supporting_area_address = 0x801effc;
_flash_main_prog_size = 0x1cffc;
_flash_main_prog_address = 0x8002000; _flash_main_prog_address = 0x8002000;
_flash_boot_size = 0x2000; _flash_boot_size = 0x2000;
_flash_boot_address = 0x8000000; _flash_boot_address = 0x8000000;

4
memory_map_debug.inc
View File

@@ -1,9 +1,7 @@
_flash_eeprom_emu_size = 0x1000; _flash_eeprom_emu_size = 0x1000;
_flash_eeprom_emu_address = 0x801f000; _flash_eeprom_emu_address = 0x801f000;
_flash_supporting_area_size = 0x4; _flash_main_prog_size = 0x1f000;
_flash_supporting_area_address = 0x801effc;
_flash_main_prog_size = 0x1effc;
_flash_main_prog_address = 0x8000000; _flash_main_prog_address = 0x8000000;
_flash_boot_size = 0x0; _flash_boot_size = 0x0;
_flash_boot_address = 0x8000000; _flash_boot_address = 0x8000000;

6
scripts/after_build.ps1
View File

@@ -8,11 +8,13 @@ $end_address=$output[2].Split(" - ")[6].Insert(0,"0x")
$ind=$output[2].LastIndexOf(" ") $ind=$output[2].LastIndexOf(" ")
$size=${end_address}-${start_address}+1 $size=${end_address}-${start_address}+1
$crc_address=[uint32]$end_address+1 $crc_address=[uint32]$end_address+1
$ss="$output_path.srec"
echo "Binary filesize - $size bytes" echo "Binary filesize - $size bytes"
$cmd=srec_cat $input_path -intel -exclude $len_address_start $len_address_end -GEN $len_address_start $len_address_end -CONSTant_Little_Endian $size 4 -o $output_path -intel $cmd=srec_cat $input_path -intel -exclude $len_address_start $len_address_end -GEN $len_address_start $len_address_end -CONSTant_Little_Endian $size 4 -o $output_path -intel
echo "$cmd" echo "$cmd"
$cmd=srec_cat $output_path -intel -crop $start_address $crc_address -CRC32LE $crc_address -o $output_path -intel $cmd=srec_cat $output_path -intel -crop $start_address $crc_address -CRC32LE $crc_address -o $output_path -intel
echo "CRC ADDRESS: CRC32:" echo "CRC ADDRESS: CRC32:"
srec_cat $output_path -intel -crop $crc_address -o - -hex-dump srec_cat $output_path -intel -crop $crc_address -o - -hex-dump
$cmd=srec_cat $output_path -intel -o $ss -Motorola