---vl6180dr

2023-07-31 10:42:03 +03:00
parent c6549ebd6f
commit 0b2cdbc8ba
24 changed files with 7378 additions and 1 deletions
--- a/main_prog/vl6180/App/custom_bus.h
+++ b/main_prog/vl6180/App/custom_bus.h
@@ -0,0 +1,139 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : custom_bus.h
+  * @brief          : header file for the BSP BUS IO driver
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+*/
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef CUSTOM_BUS_H
+#define CUSTOM_BUS_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "custom_conf.h"
+#include "custom_errno.h"
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup CUSTOM
+  * @{
+  */
+
+/** @defgroup CUSTOM_BUS CUSTOM BUS
+  * @{
+  */
+
+/** @defgroup CUSTOM_BUS_Exported_Constants CUSTOM BUS Exported Constants
+  * @{
+  */
+
+#define BUS_I2C1_INSTANCE I2C1
+#define BUS_I2C1_SCL_GPIO_PORT GPIOB
+#define BUS_I2C1_SCL_GPIO_AF GPIO_AF4_I2C1
+#define BUS_I2C1_SCL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+#define BUS_I2C1_SCL_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+#define BUS_I2C1_SCL_GPIO_PIN GPIO_PIN_8
+#define BUS_I2C1_SDA_GPIO_PIN GPIO_PIN_9
+#define BUS_I2C1_SDA_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
+#define BUS_I2C1_SDA_GPIO_PORT GPIOB
+#define BUS_I2C1_SDA_GPIO_AF GPIO_AF4_I2C1
+#define BUS_I2C1_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
+
+#ifndef BUS_I2C1_POLL_TIMEOUT
+   #define BUS_I2C1_POLL_TIMEOUT                0x1000U
+#endif
+/* I2C1 Frequeny in Hz  */
+#ifndef BUS_I2C1_FREQUENCY
+   #define BUS_I2C1_FREQUENCY  1000000U /* Frequency of I2Cn = 100 KHz*/
+#endif
+
+/**
+  * @}
+  */
+
+/** @defgroup CUSTOM_BUS_Private_Types CUSTOM BUS Private types
+  * @{
+  */
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1U)
+typedef struct
+{
+  pI2C_CallbackTypeDef  pMspInitCb;
+  pI2C_CallbackTypeDef  pMspDeInitCb;
+}BSP_I2C_Cb_t;
+#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 1U) */
+/**
+  * @}
+  */
+
+/** @defgroup CUSTOM_LOW_LEVEL_Exported_Variables LOW LEVEL Exported Constants
+  * @{
+  */
+
+extern I2C_HandleTypeDef hi2c1;
+
+/**
+  * @}
+  */
+
+/** @addtogroup CUSTOM_BUS_Exported_Functions
+  * @{
+  */
+
+/* BUS IO driver over I2C Peripheral */
+HAL_StatusTypeDef MX_I2C1_Init(I2C_HandleTypeDef* hi2c);
+int32_t BSP_I2C1_Init(void);
+int32_t BSP_I2C1_DeInit(void);
+int32_t BSP_I2C1_IsReady(uint16_t DevAddr, uint32_t Trials);
+int32_t BSP_I2C1_WriteReg(uint16_t Addr, uint16_t Reg, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C1_ReadReg(uint16_t Addr, uint16_t Reg, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C1_WriteReg16(uint16_t Addr, uint16_t Reg, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C1_ReadReg16(uint16_t Addr, uint16_t Reg, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C1_Send(uint16_t DevAddr, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C1_Recv(uint16_t DevAddr, uint8_t *pData, uint16_t Length);
+int32_t BSP_I2C1_SendRecv(uint16_t DevAddr, uint8_t *pTxdata, uint8_t *pRxdata, uint16_t Length);
+#if (USE_HAL_I2C_REGISTER_CALLBACKS == 1U)
+int32_t BSP_I2C1_RegisterDefaultMspCallbacks (void);
+int32_t BSP_I2C1_RegisterMspCallbacks (BSP_I2C_Cb_t *Callbacks);
+#endif /* (USE_HAL_I2C_REGISTER_CALLBACKS == 1U) */
+
+int32_t BSP_GetTick(void);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CUSTOM_BUS_H */
+